CIES Consortium

National Projects

JSPS Core-to-Core Program

Controlled interfacing of 2D materials for integrated device technology

The main objective of this program is to establish the advanced research networks for 2D electronic/spintronic materials with the close collaboration among CIES at Tohoku University, University of Cambridge, CNRS/University of Paris Sud (three core institutes), Engineering Department at Tohoku University, University of Tokyo, University of Tsukuba, Hitachi Cambridge Laboratory, etc. In the networks, we have conducted theoretical/experimental investigation of 2D electron/spin transport in the channel by the development of manufacturing technologies with high-level repeatability for 2D electronic materials using CVD technologies, and high-quality 2D electron/spin channel with high quality interface. In addition to create the breakthrough technologies for the next-generation semiconductor integrated devices, this program also concentrates on fostering young researchers who develop the next generation semiconductor technologies through the collaborations among the above world-class research institutes.

• JSPS Core to Core