CIES Consortium

National Projects

CAO SIP Project (3rd Phase)

Intelligent power electronics system with USPM to support grid stabilization

This R&D aims to develop elemental technologies for next-generation high power density USPMs with a wide range of energy management (EMS) applications and grid stabilization functions, as well as application technologies for smart inverters and smart power supplies. Nagaoka University of Technology is the lead organization for this research and development, and Tohoku University CIES is in charge of developing reliability-enhancing technologies for next-generation USPMs through optimal packaging technology as a joint research institute. Specifically, we are working to suppress jump voltage and reduce noise during switching by reducing the inductance of power device packages applied to nextgeneration USPMs, and to achieve high integration with gate circuits and passive components in pursuit of a compact and easy-to-handle structure. In addition, in order for the next-generation USPM to contribute to the stabilization of the power system, it is necessary to respond to synchronization and pseudo-inertia forces as a grid-forming inverter.
We will conduct research and development on package structures and gate drive methods that enable suppression of heat generation and temperature rise and overvoltage suppression of power semiconductor chips during high-current operation, which are essential for improving the synchronization and pseudo-inertia of next-generation USPMs. By advancing these R&D activities, we will contribute to the construction of intelligent power electronics systems with USPMs that support grid stabilization.