論文など

2014年度

学会発表

国際学会招待講演

32	H. Ohno, “Spintronics Devices for Integrated Circuits - an Overview”, 1st CIES Technology Forum, Tokyo, March 19, 2015.
31	T. Hanyu, D. Suzuki, N. Onizawa, S. Matsunaga, M. Natsui, and A. Mochizuki, “Spintronics-Based Nonvolatile Logic-in-Memory Architecture Towards an Ultra-Low-Power and Highly Reliable VLSI Computing Paradigm”, Design Automation & Test in Europe, Grenoble, France, March 11, 2015.
30	T. Hanyu, “Nonvolatile Logic-in-Memory Architecture for Ultra-Low　Power VLSI Systems”, IEEE International Solid-State Circuits Conference (ISSCC) 2015, San Francisco.CA, February 26, 2015.
29	T. Endoh, “Future Memory Technology with Vertical MOSFET and STT-MRAM for Ultra Low Power”, Korean Conference on Semiconductors (KCS) 2015, Incheon, Korea, February 11, 2015.
28	H. Ohno, “Nanoscale Magnetic Tunnel Junction”, Nanyang Technological University, Singapore, December 18, 2014.
27	S. Ikeda, H. Sato, H. Honjo, E. C. I. Enobio, S. Ishikawa, M. Yamanouchi, S. Fukami, S. Miura, S. Kanai, F. Matsukura, T. Endoh and H. Ohno, “Perpendicular-anisotropy CoFeB-MgO based magnetic tunnel junctions scaling down to 1X nm”, 2014 IEEE International Electron Devices Meeting (IEDM), San Francisco, USA, December 17, 2014.
26	T. Hanyu, D. Suzuki, A. Mochizuki, M. Natsui, N. Onizawa, T. Sugibayashi, S. Ikeda, T. Endoh, and H. Ohno, “Challenge of MOS/MTJ-Hybrid Nonvolatile Logic-in-Memory Architecture in Dark-Silicon Era”, 2014 IEEE International Electron Devices Meeting (IEDM), San Francisco, USA, December 17, 2014.
25	E. Prati, and T. Shinada, “Atomic Scale Devices: Advancements and Directions”, 2014 IEEE International Electron Devices Meeting (IEDM) , San Francisco, USA, December 15, 2014.
24	T. Endoh, “STT-MRAM, NV-logic with MTJ and high density memory with Vertical MOSFET”, SEMATECH Beyond CMOS Workshop Materials & Technologies for Beyond CMOS, San Francisco, USA, December 14, 2014.
23	H. Ohno , “Korea University Special Seminar”, Korea University, Seoul, Korea, December 4, 2014.
22	H. Ohno , “Nano-Scale Magnetic Tunnel Junction for Nonvolatile VLSIs”, 2nd Int. Symp. on Functionality of Organized Nanostructures (FON), Tokyo, Japan, November 27, 2014.
21	H. Ohno , “Spintronics Materials and Devices for Nonvolatile VLSIs”, 1st International Symposium on Interactive Materials Science Cadet Program (iSIMSC), Osaka, Japan, November 19, 2014.
20	S. Ikeda, H. Sato, E. C. I. Enobio, Y. Horikawa, S. Ishikawa, M. Yamanouchi, S. Fukami, S. Kanai, F. Matsukura, T. Endoh and H. Ohno, “Magnetic tunnel junctions with interfacial anisotropy CoFeB-MgO stack for STT-MRAM”, STT-MRAM Workshop, Singapore, November 11, 2014.
19	T. Shinada, E. Prati, S. Tamura, Y. Fukui, G. Koike, T. Tanii, T. Teraji, S. Onoda, T. Ohshima, L. P. McGuinness, L. Rogers, B. Naydenov, E. Wu, F. Jelezko, and J. Isoya, ldquo;Methodology of single atom control for quantum processing in silicon and diamond”, 16th Takayanagi Kenjiro Memorial Symposium, Shizuoka Univ, Japan, November 11, 2014.
18	M. Niwa, “High-k/Metal Gate System and related issues”, 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, China, October 30, 2014.
17	S. Fukami, H. Sato, C. Zhang, and H. Ohno, “Three-terminal nonvolatile spintronics memory device using spin-transfer torque and spin-orbit torque”, 14th Non-Volatile Memory Technology Symposium (NVMTS 2014), Korea, October 28, 2014.
16	H. Ohno, “Spintronics - recent advances”, 4th imec-Stanford Int. Workshop on Resistive Memories, Stanford, US A, October 28, 2014.
15	T. Hanyu, “MTJ/MOS-Hybrid Nonvolatile Logic-in-Memory Architecture Towards Ultra-Low-Power LSIs”, The 12th International System-on-Chip Workshop, Irvine, CA, USA, October 23, 2014.
14	S. Fukami, H. Sato, S. DuttaGupta, C. Zhang, and H. Ohno, “Two and Three-Terminal Spintronics Devicesfor Nonvolatile Memory and Logic”, Eleventh International Conference on Flow Dynamics (ICFD), Sendai, Japan, October 8, 2014.
13	A. Nitayama, “3D NAND Flash Memories”, 2014 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Millbrae, CA, USA, October 6, 2014.
12	H. Ohno , “Spintronic Nano-Devices for Nonvolatile VLSIs”, 1st University of Chicago / AIMR Joint Research Center Workshop, Sendai, Japan, September 18, 2014.
11	H. Sato, T. Yamamoto, E. C. I. Enobio, M. Yamanouchi, S. Ikeda, S. Fukami, K. Kinoshita, F. Matsukura, N. Kasai, and H. Ohno, “Switching current and thermal stability of perpendicular magnetic tunnel junction with MgO/CoFeB/ Ta/CoFeB/MgO recording structure scaling down to 1X nm”, International Conference of Solid State Devices and Materials 2014(SSDM2014), Tsukuba, Japan, September 11, 2014.
10	A. Nitayama, “Trends on Advanced Semiconductor Memories”, International Conference of Solid State Devices and Materials 2014(SSDM2014), Tsukuba, Japan, September 11, 2014.
9	S. Fukami, C. Zhang, and H. Ohno, “Magnetic domain wall motion and spin-orbit torque induced magnetization switchingfor three-terminal spintronics devices”, The 6th IEEE International Nanoelectronics Conference (IEEE INEC 2014), Hokkaido Univ, Japan, July 30, 2014.
8	H. Ohno, “Spintronics for nonvolatile VLSIs”, Tsukuba Nanotechnology Symposium (TNS’14), Tsukuba, Japan, July 25, 2014.
7	H. Ohno, Current status and prospects of magnetoresistive random access memory technology, 6th Forum on New Materials (CIMTEC), Montecatini, Italy, June 29, 2014.
6	S. Fukami and H. Ohno, “Current-induced domain wall motion in Co/Ni wires for nonvolatile memories and logic circuits”, 12th RIEC International Workshop on Spintronics, Sendai, Japan, June 25, 2014.
5	T. Hanyu, “Challenge of Nonvolatile Logic-in-Memory Architecture: Design Examples and the Future Prospects”, 2014 Spintronics Workshop on LSI, Hawaii, USA, June 13, 2014.
4	S. Ikeda, H. Sato, E. C. I. Enobio, Y. Horikawa, S. Ishikawa, M. Yamanouchi, S. Fukami, S. Kanai, F. Matsukura, T. Endoh and H. Ohno, “Magnetic tunnel junctions with (Co)FeB-MgO double-interface recording structure for nonvolatile VLSIs”, 2014 Spintronics Workshop on LSI, Hawaii, USA, June, 2014.
3	T. Endoh, “Spintronics-based Nonvolatile Computers”, 2014 Spintronics Workshop on LSI, Hawaii, USA, June 13, 2014.
2	A. Mochizuki, M. Natsui, N. Sakimura, T. Sugibayashi, and T. Hanyu, “Challenge ofNonvolatile TCAM Design Automation”, ULSI Workshop 2014, Hawaii, USA, June 13, 2014.
1	T. Endoh, “Embedded STT-MRAM”, 1st International Workshop on Data-Abundant System Technology, California, USA, March 22, 2014.